Characteristics and Physical Mechanisms of Positive Bias and Temperature Stress-Induced Drain Current Degradation in HfSiON nMOSFETs [Електронний ресурс] / C.-T. Chan, C.-J. Tang, T. Wang и др. // IEEE Transactions on Electron Devices. – 2006. – № 6. – P. 1340–1346
- Електронна версія (pdf / 319 Kb)
Статистика використання: Завантажень: 9
Анотація:
Drain current degradation in HfSiON gate dielectric nMOSFETs by positive gate bias and temperature stress is investigated by using a fast transient measurement technique. The
degradation exhibits two stages, featuring a different degradation rate and stress temperature dependence. The first-stage degradation is attributed to the charging of preexisting high-k dielectric traps and has a log(t) dependence on stress time, whereas the
second-stage degradation is mainly caused by new high-k trap creation. The high-k trap growth rate is characterized by two techniques, namely 1) a recovery transient technique and 2) a chargepumping technique. Finally, the effect of processing on high-k trap growth is evaluated.
degradation exhibits two stages, featuring a different degradation rate and stress temperature dependence. The first-stage degradation is attributed to the charging of preexisting high-k dielectric traps and has a log(t) dependence on stress time, whereas the
second-stage degradation is mainly caused by new high-k trap creation. The high-k trap growth rate is characterized by two techniques, namely 1) a recovery transient technique and 2) a chargepumping technique. Finally, the effect of processing on high-k trap growth is evaluated.
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