Negative-bias temperature instability (NBTI) is amajor challenge for modern integrated circuits and may represent a key factor for the success of a technology. In this paper, NBTI is approached from a process point of view, providing a general picture of the manufacturing process steps that affect NBTI performance. It is found that several process steps may be optimized to reduce the NBTI susceptibility of p-type MOSFETs. The choice of the cure approach depends on the device application, on the technology, and also on the equipment.