Вид документа:

Стаття періодики

Tsai Jung-Hui. DC Performance of InP/InGaAs p-n-p Heterostructure-Emitter Bipolar Transistor [Електронний ресурс] / Jung-Hui Tsai, Yu-Chi Kang // IEEE Transactions on Electron Devices [Електронний ресурс]. – 2006. – № 5. – Pp. 1265–1267


Статистика використання: Завантажень: 1
Анотація:
The dc performance of a novel InP/InGaAs p-n-p heterostructure-emitter bipolar transistor is first demonstrated. Though the valence band discontinuity at an InP/InGaAs heterojunction is relatively large, the addition of a heavy doped as well as thin p+-InGaAs
emitter layer between a p-InP confinement and n+-InGaAs base layers effectively eliminates the potential spike at emitter–base junction, lowers the emitter–collector offset voltage, and increases the barrier for electrons, simultaneously. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV are achieved. To the author’s knowledge, the offset voltage of the studied device is the lowest value among of the InP/InGaAs p-n-p heterojunction bipolar transistors.